🔬 Science & TechMAINS · GS3.13 · GS3.12

Taped out on Republic Day, working silicon by Independence Day

A Chennai fabless startup backed by the Design Linked Incentive scheme achieved first-pass silicon success with VIHAAN, a fibre broadband networking chip — the concrete version of the semiconductor ambition announced from the Red Fort.

What happened

For Prelims

For UPSC: The concrete counterpart to semiconductor rhetoric. Use it for the fabless model and design-led value capture, the Design Linked Incentive scheme, why design capability precedes fabrication, and state-level venture capital in deep tech.
What it is NOT: First-pass silicon is a design milestone, not commercial production — VIHAAN's production tape-out is targeted for 2027, and the chip was fabricated at a foundry, not in India.

For Mains

Syllabus: GS3.13 · GS3.12 · Linkage L2

Anchor
Working silicon on the first attempt is the only semiconductor claim that cannot be made in a speech.
Substantiation (data)
First-pass success on a fibre broadband SoC, production tape-out targeted for 2027, and DLI-backed firms cumulatively raising over $100 million across 35 tape-outs.
Exemplification
Design captures up to half the value addition in the semiconductor chain — which is why a fabless startup matters even without a domestic leading-edge fab.
Problematisation
The chip was designed here and fabricated elsewhere; without domestic foundry access, design success still leaves the supply chain's chokepoint abroad.
Way-forward
Link DLI graduates to the fabs under construction and to public procurement in telecom and defence so first customers exist domestically.
Position
Semiconductor sovereignty is built one working chip at a time, not one announcement at a time.
Deploys into: Frontier technology + indigenisation (GS3.13, GS3.12) · the fabless model and design-led value capture, the Design Linked Incentive scheme, and state-level venture capital in deep tech.
Ministry of Electronics & IT · 2026-08-15 · PRID 2299883 · PIB source ↗
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