๐Ÿ”ฌ Science & TechMAINS ยท GS3.13 ยท GS3.12

Semicon India clears ten chip projects worth Rs 1.6 lakh crore

The government details its full semiconductor push as the Budget announces India Semiconductor Mission 2.0.

What happened

Background & context

A semiconductor โ€” the silicon "chip" โ€” is the basic building block of every electronic device, from mobile phones and laptops to cars, missiles, satellites and power grids. India consumes a very large volume of chips but has historically imported almost all of them, leaving a strategic and economic dependence on a handful of foreign foundries. The Semicon India Programme is the policy answer to that gap: launched in January 2022 by the Ministry of Electronics and IT, it is designed to seed every stage of the chip value chain on Indian soil rather than only one slice of it.

The programme sits within the broader "Make in India" / Atmanirbhar Bharat manufacturing thrust and is a sibling of the Production-Linked Incentive (PLI) schemes that incentivise electronics, mobile-phone and component manufacturing. Where the electronics PLI rewards assembly volumes, the Semicon India Programme targets the harder, more capital-intensive upstream โ€” the fabrication plant (fab) that actually etches circuits onto silicon wafers, and the assembly-test-packaging units that turn finished wafers into usable chips. Its delivery arm, the India Semiconductor Mission (ISM), is an independent business division housed under the Digital India Corporation; it appraises proposals, disburses fiscal support and acts as the single nodal agency for the sector.

A key reform that made the current pipeline possible was the decision to offer uniform fiscal support of up to 50% of project cost across fabs, display fabs, compound-semiconductor units and ATMP/OSAT facilities, sharply de-risking the enormous capital outlays a fab demands. The releases now report the result of that policy: a clutch of marquee investments has moved from intent to construction and, in two cases, to commercial output.

It helps to read the chip value chain as a sequence, because the programme deliberately funds each link rather than one. First comes design โ€” laying out the circuit using electronic-design-automation (EDA) software; this is where India already has deep talent and where the design-linked support and free university tools are aimed. Next is fabrication (the fab) โ€” etching that design onto silicon wafers in an ultra-clean facility costing billions of dollars, the most capital-intensive and import-dependent link, addressed by the Tata-PSMC and CG Power lines. Then assembly, testing, marking and packaging (ATMP / OSAT) โ€” slicing wafers into individual chips, wiring and sealing them, which Micron, Kaynes and the Tata Assam unit cover. Around these sit compound-semiconductor units (using materials such as silicon carbide for power and high-frequency uses, the SiCSem line) and advanced packaging (3D Glass Solutions). Reading the ten units against these links is exactly the kind of mapping a "match the pairs" question rewards.

For Prelims

The ten approved units

The cleared projects span the full chain โ€” wafer fabs, OSAT/ATMP packaging units, compound-semiconductor and advanced-packaging lines โ€” and are anchored across several States, which is itself an exam-relevant pairing set.

UnitStateInvestment / partner
Micron (ATMP)Gujarat~Rs 22,516 cr
Tata Electronics (fab)Gujarat~Rs 91,526 cr ยท with PSMC, Taiwan
Tata Electronics (OSAT)Assam~Rs 27,120 cr
CG PowerGujaratwith Renesas / STARS
KaynesGujarat~Rs 3,307 cr
Vama Sundari / FoxconnUttar Pradesh~Rs 3,706 cr
3D Glass SolutionsOdishaadvanced packaging
SiCSemOdishacompound semiconductor
CDILPunjabdiscrete devices
ASIPAndhra Pradeshassembly/packaging

What it is NOT

For UPSC: Semicon India Programme (Jan 2022, MeitY) is delivered by the India Semiconductor Mission โ€” 10 projects, ~Rs 1.6 lakh crore, production already begun at Micron and Kaynes; ISM 2.0 was announced in Budget 2026-27 to add equipment, materials, full-stack design and Indian IP.

Why it matters

Chips are a chokepoint of modern strategic and economic power. A country that cannot fabricate or even package semiconductors is exposed every time global supply tightens โ€” as the 2020-22 chip shortage showed when it stalled car and appliance production worldwide. Building domestic fabs and packaging lines reduces import dependence, shields critical sectors such as defence, telecom and automobiles, and captures more of the value that India today exports as raw demand. The shift from approvals to actual commercial output at two plants is the substantive marker here: it converts a policy promise into the first Made-in-India packaged chips.

The programme also addresses a quieter bottleneck โ€” talent. Fabrication is capital-heavy, but the design layer is talent-heavy, and India's strength has long been in chip design rather than manufacturing. Seeding 315 universities with design tools, enabling 211 tape-outs and approving 24 design projects builds the engineering base that any sustainable ecosystem needs. ISM 2.0 deepens this by widening the mission from fabrication alone to the surrounding ecosystem โ€” equipment, materials, full-stack design and home-grown IP โ€” the parts that determine whether the gains endure once the initial subsidies taper.

How it compares

India's approach is best understood against the global wave of state-backed chip support. The United States enacted its own large semiconductor incentive package to re-shore fabs, and Taiwan, South Korea, Japan and the European Union each run substantial programmes to anchor or expand domestic capacity. India is a late entrant, which has two faces: it starts without an existing fab base, but it can target the fast-growing packaging and design segments where the entry cost is lower and where its engineering talent is already competitive. The strategic logic mirrors other "critical-technology" pushes โ€” much as the country sought to localise solar-cell and battery manufacturing through dedicated incentives, the Semicon India Programme localises the most foundational hardware of the digital economy. The distinguishing design choice is the single-window mission (ISM) plus uniform 50% cost support, intended to make India a predictable destination for capital-intensive, long-gestation fab investments.

For Mains

Anchor
The Semicon India Programme and ISM 2.0 can anchor an answer on India's drive to build a self-reliant semiconductor manufacturing ecosystem and reduce strategic import dependence.
Data
Concrete substantiation: 10 projects, ~Rs 1.6 lakh crore in commitments, production begun at Micron and Kaynes, 315 universities given design tools and 211 chips taped out.
Example
A live example of indigenisation of critical technology โ€” the Tata-PSMC fab in Gujarat and the Tata OSAT in Assam exemplify upstream manufacturing taking root across States.
Problematise
Frames the gap the policy still admits: only two of ten units are producing, IP and equipment remain import-dependent, and ISM 2.0 itself signals that the first phase did not close the full-stack gap.
Way-forward
ISM 2.0's focus on equipment, materials, full-stack design and supply-chain resilience supplies a ready way-forward on deepening the ecosystem beyond assembly.
Position
The government's stated stance: uniform fiscal support up to 50% of project cost and a single nodal mission (ISM) to de-risk and coordinate the sector.
Deploys into: indigenisation and development of new technology (GS3.12); achievements of Indians in science & technology and IT/electronics (GS3.13); and the strategic dimension of supply-chain security.
Ministry of Electronics & IT ยท 2026-04-01 ยท PRID 2247814 ยท PIB source โ†—